1. Field of the Invention
The present invention relates to a microcomputer which outputs the states of LSI internal operations and internal storage devices to the outside.
2. Description of the Prior Art
FIG. 7 is a block diagram showing the internal configuration of a conventional single-chip microcomputer with a built-in D/A converter. In the figure, 1 shows a whole view of the single-chip microcomputer which incorporates program counter 2, general-purpose register 3, ROM 4, RAM 5, D/A converter 6 and register 7 for D/A converters. These devices including the register for D/A converters are connected to data bus 8 and address bus 9. The directions of arrows shown by the data bus 8 and address bus 9 indicate the directions of input and output of signals on the buses (address data and data). 10 is the input of said D/A converter 6 which is output from register 7 for D/A converters. 11 is a bus timing controller which controls buses 8 and 9 within the microcomputer 1 and outputs part of timing to the outside of the microcomputer as bus timing control signal 12. 13 is the analog output of D/A converter 6, and 14 and 15 are signal outputs from data bus 8 and address bus 9 within the microcomputer to the outside of the microcomputer, respectively. 16 is an interrupt controller which controls interrupt handling within the microcomputer, according to interrupt input 17 from outside.
A multi-axis cable is used for the parallel outputs of output signals 12, 14 and 15, and the terminal of microcomputer 1 is comprised of many pins.
The operation will be described next. Program counter 2, general-purpose register 3, ROM 4 and RAM 5 are connected to data bus 8 and address bus 9 for transmitting information under the time-slot control of bus timing controller 11. FIG.8 shows an example of the operation. The addresses and written/read contents of program counter 2, general-purpose register 3, ROM 4 and RAM 5 appear on address bus 9 and data bus 8 on a time-division basis and are specified by timing control signal 12.
Basic clock 4 12a, SYNC signal 12b, WR signal 12c and RD signal 12d shown in FIG.8 are output from bus timing controller 11. The first number 23a of an instruction code which appears on address bus 9 is shown by the fall of SYNC signal 12b and is the address PC of the program counter. Data 25 are written by the rise of WR signal 12c as DATA.sub.x on RAM 5 with an address 24 of 00AD.sub.L shown by address bus 9.
AD.sub.H is an 8-bit upper address, while AD.sub.L is an 8-bit lower address. Signal .phi. is a basic instruction clock, SYNC signal is the first address timing of the instruction code, WR is writing timing to program counter 2, general-purpose register 3 and RAM 5, and RD is reading timing from program counter 2, general-purpose register 3, ROM 4 and RAM 5. Like general-purpose register 3, register 7 for D/A converters is connected to address bus 9 and data bus 8 to enable bus timing controller 11 to write data from data bus 8 and read data out to data bus 8. The written (latched) contents of register 7 for D/A converters are input into D/A converter 6 as input 10 of the D/A converter. D/A converter 6 converts digital data into analog signals for outputting to the outside of microcomputer 1 as output 13 of the D/A converter.
There are two methods to output the contents of program counter 2, general-purpose register 3, ROM 4 and RAM 5 within the microcomputer to the outside of the microcomputer 1. One is to output bus timing control signal 12, address bus output 14 and data bus output 15 to the outside of microcomputer 1 and to achieve these contents in the RAM 5 and others from relations among the three timings.
The other method is to use software to transfer the contents of program counter 2, general-purpose register 3, ROM 4 and RAM 5 to register 7 for D/A converters via data bus 8 and to achieve these contents as output 13 of the D/A converter.
Since microcomputer 1 incorporates interrupt input 17 and an interrupt controller 16, it can control the execution of interrupt programs.
The contents of these devices including RAM 5 are input into register 7 for D/A converters as occasion demands through the execution of this interrupt program. The contents including those of RAM 5 are not transferred to register 7 for D/A converters without the occurrence of interrupt. After interrupt, the processing of a main program is suspended.
Since the conventional single-chip microcomputer 1 with a built-in D/A converter is configured as described above, there have been two methods to output the internal states of the microcomputer including that of the program counter to the outside of the microcomputer: the first method is to output all of address bus, data bus and bus timing control signals, while the second method is to transfer desired data to register 7 for D/A converters according to software instructions and to achieve them from the output of the D/A converter 6.
The first method needs a large number of signal pins. Therefore, it has been difficult for high-density, small-sized single-chip microcomputers which have restrictions on the number of pins per microcomputer to mount a large number of pins because of small volume and mounting difficulties. Since measurement signals are digital, it also has been difficult to identify them from lines of pulses observed.
The second method uses software and accordingly, takes a long time to output the contents to the outside. It has had a disadvantage that a program required for the regular output of the contents to the outside is very large in volume.